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We propose a systematic application-specific hardware design methodology for designing Spiking Neural Network (SNN), SNNOpt, which consists of three novel phases: 1) an Olliver-Ricci-Curvature (ORC)-based architecture-aware network partitioning, 2) a reinforcement learning mapping strategy, and 3) a Bayesian optimization algorithm for NoC design space exploration. Experimental results show that SNNOpt achieves a 47.45% less runtime and 58.64% energy savings over state-of-the-art approaches.more » « less
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Chen, Jinbo; Lu, Chengcheng; Ni, Jiacheng; Guo, Xiaochen; Girard, Patrick; Cheng, Yuanqing (, IEEE Transactions on Very Large Scale Integration (VLSI) Systems)
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Zhang, Hong; Mukherjee, Bhramar; Arthur, Victoria; Hu, Gang; Hochner, Hagit; Chen, Jinbo (, Annals of Applied Statistics)
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